Recently, along with the increasing degree of integration in a semiconductor device, a circuit pattern for an LSI element that constitutes the semiconductor device has been more miniaturized. For the miniaturization of the pattern, not only a smaller line width but also improvements in the dimensional accuracy and positional accuracy of the pattern are required. A storage device called a memory is not an exception. It has been continuously required that a given charge necessary for storing be retained in a smaller region in a cell formed by use of a highly accurate processing technique.
Various memories such as a DRAM, an SRAM, and a flash memory have heretofore been manufactured. All of these memories use MOSFETs for memory cells. Therefore, in response to pattern miniaturization, the dimensional accuracy is required to be improved at a rate higher than the rate of the miniaturization. Accordingly, a lithography technique for forming such a pattern is also under a heavy load. This is a reason for a rise in the cost for a lithography process that accounts for a large proportion of current mass-production costs, that is, a rise in manufacturing costs.
In the meantime, a recently suggested technique that solves the above-mentioned problem is a memory called a ReRAM in which a memory cell comprises a non-ohmic element typified by a diode and a resistance-change material. The ReRAM can be configured without using the accumulation of a charge for storing and without using a MOSFET for the memory cell. Thus, the ReRAM is expected to provide a higher degree of integration than existing trends.
However, the diode used in the memory cell of the ReRAM has to satisfy certain standards regarding the allowable magnitude of a current that can flow in a forward direction depending on the characteristics of the resistance-change material and regarding the allowable magnitude of a leakage current that flows in a reverse direction. In order to satisfy such standards, many technical problems have to be solved particularly when a cell having a small sectional area is used as a result of a higher degree of integration.
Along with the pattern miniaturization, the conventionally used memory that uses a MOSFET for a cell has become less acceptable in respect of the dimensional accuracy and positioning accuracy of the pattern, and entails factors for a rise in manufacturing costs in addition to technical difficulties. On the other hand, in the ReRAM which does not use a MOSFET for a cell and which uses a non-ohmic element typified by a diode and a resistance-change material, it is preferable to use a diode having a low reverse leakage current in order to prevent erroneous writing into an unselected cell and hold down the total power consumption in writing. In general, the reverse leakage current can be suppressed by increasing the thickness of a low-impurity-concentration layer (i-layer) of the diode. However, in order to maintain the easiness of processing, the thickness of the low-impurity-concentration layer (i-layer) of the diode needs to remain less than or equal to a given thickness. Fulfilling these requirements is a challenge.